龍華科技大學電子工程系標題

 

 

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龍華科技大學>電子工程系 > 師資介紹標題

 

 

一、基本資料

黃信雄老師相片

 

職級:助理教授

姓名: 黃信雄

E-Mail: pp022@mail.lhu.edu.tw

研究室: C3132

分機號碼: 5632

到校服務日期:97年 8 月

二、主要學歷


畢／肄業學校

國別

主修學門系所

學位

起訖年月

中原大學

台灣

資訊工程研究所

碩士

87.9~89.7

中原大學

台灣

電子研究所資訊組

博士

92.9~97.1

三、現職及與專長相關之經歷


服務機關

服務部門／系所

職稱

起訖年月

龍華科技大學

資訊網路工程系

兼任講師

93/9~97/6

新竹台晶科技

設計部

設計工程師

91/9~92/9

新竹智邦科技 

硬體ㄧ部

研發工程師

89/7~91/7

四、專長
演算法設計與分析、物件導向程式設計、網路工程。

五、國家考試
六、獎勵與證照

  1. 數位邏輯能力認證監評委員，發照機構為台灣嵌入式暨單晶片系統發展協會，證照字號TDD090117 。
  2. 數位邏輯能力認證丙級，發照機構為台灣嵌入式暨單晶片系統發展協會，證照字號TDC090117。
  3. 雙軌訓練旗艦計畫，微科技職類監評人員，發照機構行政院勞委會職訓局泰山職業訓練中心。
  4. ACA Photoshop CS5證照，發照機構為Adobe Systems Incorporated。

七、建教合作、企業實務專案
1. 於98學年期間，與台灣嵌入式暨單晶片系統發展協會進行產學合作乙案，產學合內容為設計「數位邏輯丙級數位教材」，執行期間為民國 99年2月25日起至民國99年7月12日止。
2.於101年1月1日起，與「掌宇股份有限公司」進行企業實務研究計劃合作乙案，企業實務研究計畫內容為設計「智慧型循跡線迷宮鼠實驗平台研製」，執行期間為民國 101年1月1日起至民國101年11月31日止。

八、國科會專題研究計


國科會計畫名稱

計劃編號

擔任職務

執行時間

具效能與連線互擾考量之3D繞線樹構建演算法

NSC100-2221-E-262-005-

主持人

2011/08/01~ 2012/07/31

結合模組變形技術最小化晶片面積和關鍵路徑效能之3D平面規劃

NSC 99 - 2221 - E - 262

主持人

2010/08/01~ 2011/07/31

產業需求導向的線迷宮鼠教材與教具實作

NSC 99-2511-S-262-003-

共同主持人

2010/08/01~ 2011/07/31

考量電子漂移和障礙物限制之電流導向線路佈線設計

NSC 98-2221-E-262 -015

主持人

2009/08/1~ 2010/07/31

九、研究成果目錄
(A) 期刊論文

  1. Hsin-Hsiung Huang* and Tsai-Ming Hsieh, “3D Partitioning for Interference and Area Minimization,”International Journal of Circuits, Systems and Signal Processing, Issue 6, Volume 5, pp.635-642, Oct. 2011 [International Journal] (NSC 99-2221-E-262 -027)
  2. Hsin-Hsiung Huang*, Jui-Hung Hung, Cheng-Chiang Lin, and Tsai-Ming Hsieh, “Wire Planning for Electromigration and Interference Avoidance in Analog Circuits,” accepted by IEICE Transactions on Fundamentals of Electronics, Communications, and Computer Sciences, Vol.E94-A, No.11, pp.2402-2411, Nov.2011. (SCI/EI Journal) (NSC 98-2221-E-262 -015)
  3. Juing-Huei Su, Chyi-Shyong Lee, Hsin-Hsiung Huang*, and Cheng-Yu Huang, “A Micromouse Kit for Teaching Autonomous Mobile Robots,” accepted for publication in the International Journal of Electrical Engineering Education, pp.188-201, Dec. 2011. [SCI/EI]
  4. Hsin-Hsiung Huang*, Chyi-Shyong Lee, Juing-Huei Su, Chia-Lung Yang and Tsai-Ming Hsieh, “Industry-Orientation Training Course by Line Following Maze Robot,” in International Journal of Education and Information Technologies, pp. 105-112, 2011.(NSC99-2511-S-262-003)
  5. Juing-Huei Su, Chyi-Shyong Lee, Hsin-Hsiung Huang*, Sheng-Hsiung Chuang and Chih-Yuan Lin, “An Intelligent Line-Following-Robot Project for Introductory Robot Courses,” to appear in the World Transactions on Engineering & Technology Education (WTE&TE), Vol.8, No.4, pp.455-461, 2010.
  6. Jui-Hung Hung, Yao-Kai Yeh, Yu-Cheng Lin, Hsin-Hsiung Huang* and Tsai-Ming Hsieh, “ECO-Aware Obstacle-Avoiding Routing Tree Algorithm,” WSEAS Transactions on Circuits and Systems (2010), Issue 9, Volume 9, pp. 567-576, Sep. 2010. (EI Journal)
  7. H. C. Chen, H. H. Huang* and T. M. Hsieh, “Integer Linear Programming-based ECO Approach with Wire Length Consideration,”in Journal of Advanced Engineering, Vol. 5, No. 4, pp. 347-355, 2010.
  8. H.A. Chien, C.C. Lin, Hsin-Hsiung Huang*, and T.M. Hsieh, “Optimal Supply Voltage Assignment under Timing, Power and Area Constraints,” IEICE Transactions on Fundamentals of Electronics, Communications, and Computer Sciences, Vol.E93, NO4, pp. 761-768, 2010/4. (SCI/EI Journal)
  9. S.P Chang, H.H. Huang*, C.C. Lin, and T.M. Hsieh (2009), “Timing-Driven X-Architecture Routing Tree Construction Among Rectangular and Non-Rectangular Obstacles,” in WSEAS Transactions on Circuits and Systems, Issue 6, Volume 8, pp. 433-442, June 2009. (EI Journal)
  10. Yu-Cheng Lin, Ming-Hua Lin, Hsin-Hsiung Huang*, Lu-Yao Lee (2009), "Using Simulated Annealing Algorithm for Maximizing Social Utility in Dynamic Spectrum Management," in WSEAS Transactions on Communications, Issue 7, Volume 8, pp 638~647. 2009. (EI Journal)
  11. Yu-Cheng Lin, Shin-Jia Chen, Ping-Liang Chen and Hsin-Hsiung Huang* (2008); “An Enhanced Congestion-Driven Rectilinear-based Floorplanning,” WSEAS Transaction on Circuits and Systems, Issue 8, Volume 7 pp. 811-821, Aug. 2008.(EI Journal)
  12. Yu-Cheng Lin, Hsin-Hsiung Huang*, Cheng-Chiang Lin and Tsai-Ming Hsieh (2008); “Optimal Voltage Assignment Approach for Low Power Using ILP,” WSEAS Transaction on Circuits and Systems, Issue 7, Volume 7, pp. 728-737, July 2008. (EI Journal)
  13. Hsin-Hsiung Huang*, Hui-Yu Huang, De-Jing Huang, Tsai-Ming Hsieh (2006); “Efficient Obstacle-Avoiding Rectilinear Steiner Tree Construction Algorithms”, WSEAS Transactions on Circuits and Systems, Vol.5, No.12, pp.1775-1782, 2006/11. (EI Journal).
  14. Hsin-Hsiung Huang*, Chung-Chiao Chang, Chih-Yuan Lin, Chih-Hung Lee, Tsai-Ming Hsieh (2006); “Congestion-Driven Floorplanning by Adaptive Modular Shaping”, Journal of Advanced Engineering, Vol.1 , No.1 pp 31-43, 2006/7.

(B) 研討會論文

  1. Juing-Huei Su, Chyi-Shyong Lee, Hsin-Hsiung Huang, Shih-Wei Chao, Sheng-Hong Lin, Yu-Cheng Wu, “A versatile kit for teaching intelligent mobile robots,” Proceedings of 14th FIRA RoboWorld Congress - Next Wave in Robotics, pp. 42-49, 2011.(EI)
  2. Pi-Hua Su, Hsin-Hsiung Huang* and Tsai-Ming Hsieh, “Timing- and Interference-Free Multi-layer Routing Tree,” in Proceedings. of the 54th IEEE Midwest Symposium on Circuits and Systems (2011MWSCAS),Seoul, Korea, 2011.(EI).(NSC100-2221-E-262-005)
  3. Hsin-Hsiung Huang*, Chyi-Shyong Lee, Juing-Huei Su, Chia-Lung Yang and Tsai-Ming Hsieh, “The Implementation of Shortest Path Algorithm for Line-Maze Robot,” in Proceedings of 2011 First Conference on Engineering Education, Taiwan, 2011.(NSC 99-2511-S-262-003-)
  4. Chyi-Shyong Lee, Hsin-Hsiung Huang* and Pei-Jiun Huang, “The development and application of omni-directional robot platform in teaching robotics,” in Proceedings of 2011 First Conference on Engineering Education, Taiwan, 2011.
  5. Juing-Huei Su, Chyi-Shyong Lee, Hsin-Hsiung Huang*, Goi-Wei Cheng, & Chuan-Sian Fu, “The Application of MATLAB/SIMULINK in Intelligent Robot Education and Contests,” in Proceedings of 2011 First Conference on Engineering Education, Taiwan, 2011.
  6. Hsin-Hsiung Huang* and Tsai-Ming Hsieh, “3D Area-Aware Partitioning for Floorplanner,” Proceedings of the 5th International Conference on Circuits, Systems and Signals, Corfu Island, Greece, 2011. (EI) (NSC 99-2221-E-262 -027)
  7. Chyi-Shyong Lee, Hsin-Hsiung Huang*, Juing-Huei Su, Yu-Jhe Huang and Tsai-Ming Hsieh, “Industry-based Training Course for Line Following Maze Robot Implementation,” in Proceeding of 9th WSEAS International Conference on Education and Education Technology (EDU’10), pp. 298-302, 2010. (EI) (NSC99-2511-S-262-003)
  8. Juing-Huei Su, Chyi-Shyong Lee, and Hsin-Hsiung Huang*, “The application of micromouse and MATLAB in teaching autonomous mobile robots,” in Proceeding of 9th WSEAS International Conference on Education and Education Technology (EDU’10), pp.284-289, 2010. (EI)
  9. Jui-Hung Hung, Yao-Kai Yeh, Yu-Cheng Lin, Hsin-Hsiung Huang*, Tsai-Ming Hsieh, “X-Architecture Obstacles-Avoiding Routing with ECO Consideration,” in Proceedings of 14th WSEAS International Conference on CIRCUITS, pp. 133-138, 2010/7. (EI)
  10. Hsin-Hsiung Huang*, Juing-Huei Su, Chyi-Shyong Lee, Jheng-Yu Huang, and Sheng-His Chuang, “Hands-on intelligent mobile robot laboratory with support from the industry,” in Proceedings of the 1st Annual Engineering Education Conference (EDUCON), 2010/4. (EI)
  11. Cheng-Chiang Lin, Hsin-Hsiung Huang*, His-An Chien, Tsai-Ming Hsieh, “Obstacle-Avoiding Electromigration Aware Wire Planning for Analog Circuits” in Proceedings of IEEE International Symposium on Integrated Circuits (ISIC 2009), pp. 651-654. 2009/12. (EI) (NSC 98-2221-E-262 -015)
  12. Chun-Hua Chung, His-An Chien, Hsin-Hsiung Huang*, and Tsai-Ming Hsieh “ILP-Based Optimal Multi-Threshold Voltages Assignment under Performance Constraints,” in Proceedings of IEEE International Symposium on Integrated Circuits (ISIC 2009), pp. 417-420. 2009/12. (EI)
  13. Juing-Huei Su, Sheng-Hsiung Chuang, Hsin-Hsiung Huang*, and Chyi-Shyong Lee, “The implementation of an advanced maze-solving and path planning algorithm for micromouse contests and robot education,” in Proceedings of International conference on Technology education, 2009/11.
  14. Juing-Huei Su, Sheng-Hsiung Chuang, Hsin-Hsiung Huang*, and Chyi-Shyong Lee, “An intelligent line-following-robot for introductory robot courses,” in Proceedings of International conference on Technology education,2009/11.
  15. Cheng-Chiang Lin, Pei-Shan Wu, Jiun-Ying Yu, Yu-Cheng Lin, Hsin-Hsiung Huang* and Tsai-Ming Hsieh, “Graph-based Wire Planning for Analog Circuits,” in 2009 International Workshop on Computer Architecture, VLSI, and Embedded Systems (NCS2009), Taipei, Taiwan, 2009/11. (NSC 98-2221-E-262 -015)
  16. Hsin-Hsiung Huang*, Chyi-Shyong Lee, Juing-Huei Su, Chia-Lung Yang and Tsai-Ming Hsieh, “The Implementation of a Line Following Maze Robot for Mobile Robot System Courses,” in Proceedings of CACS International Automatic Control Conference (CACS/IACC 2009), 2009/11.
  17. Cheng-Chiang Lin, Hsin-Hsiung Huang*, Yu-Cheng Lin, and Tsai-Ming Hsieh, “Engineering Change Order-Driven Routing Tree Construction,” in 20th VLSI Design/CAD Symposium, 2009/8.
  18. Hsin-Hsiung Huang*, Shu-Ping Chang, Yu-Cheng Lin, and Tsai-Ming Hsieh, ”Timing-Driven Non-Rectangular Obstacles-Avoiding Routing Algorithm for the X-Architecture,” in Proceedings of 8th WSEAS International Conference on Instrumentation, Measurement, Circuits and Systems (IMCAS 2009), pp. 31-34, 2009/5. (EI)
  19. Yu-Cheng Lin, Ming-Hua Lin, Hsin-Hsiung Huang*, Lu-Yao Lee, ” A Simulated Annealing Approach for Social Utility Maximization in Dynamic Spectrum Management,” in 8th WSEAS International Conference on Instrumentation, Measurement, Circuits and Systems (IMCAS 2009), pp. 244-247, 2009/5. (EI)
  20. Hsin-Hsiung Huang*, Han-Chung Chen, Yu-Cheng Lin and Tsai-Ming Hsieh (2009), “Optimal Assignment for Multiple Supply Voltages under Timing-Constraints,” in 19th VLSI Design/CAD Symposium, 2008/8.
  21. Yu-Cheng Lin, Shin-Jia Chen, Ping-Liang Chen and Hsin-Hsiung Huang* (2008), “Congestion-Driven Floorplanning with Module Reshaping,” in Proceedings of 12th WSEAS International Conference on Circuits, pp.391-396, 2008/7. (EI)
  22. Yu-Cheng Lin, Cheng-Chiang Lin, Hsin-Hsiung Huang*, Tsai-Ming Hsieh (2008), “Optimal Dual Voltage Assignment Algorithm for Low Power under Timing-Constraints,” in Proceedings of 12th WSEAS International Conference on Circuits, Greece, pp. 202-205, 2008/7. (EI)
  23. Hsin-Hsiung Huang*, Hui-Yu Huang, Yu-Cheng Lin and Tsai-Ming Hsieh (2008), “Timing-Driven Obstacles-Avoiding Routing Tree Construction for A Multiple-layer System,” in Proceedings of IEEE International Symposium on Circuits and Systems (ISCAS 2008), pp. 1200-1203,Seattle, USA, 2008/5. (EI)
  24. Hsin-Hsiung Huang*, Shu-Ping Chang, Yu-Cheng Lin and Tsai-Ming Hsieh (2008), “Timing-Driven X-Architecture Router among Rectangular Obstacles,” in Proceedings of IEEE International Symposium on Circuits and Systems (ISCAS 2008), pp. 1804-1807, Seattle, USA, 2008/5. (EI)
  25. Hsin-Hsiung Huang*, Yu-Cheng Lin, Hui-Yu Huang, Tsai-Ming Hsieh (2007);“Partition-based Routing Tree Algorithm with Obstacles,” in Proceedings of IEEE International Symposium on Integrated Circuits (ISIC 2007), Singapore, pp. 576-579, 2007/9. (EI)
  26. Hsin-Hsiung Huang*, Shu-Ping Chang, De-Jing Huang, and Tsai-Ming Hsieh (2007);“Timing-Driven Steiner Tree Construction among the Obstacles,” in Proceedings of IEEE International Symposium on Integrated Circuits (ISIC 2007),Singapore, pp.196-199, 2007/9.
  27. Hsin-Hsiung Huang*, Tung-Fu Chiu, Yu-Cheng Lin and Tsai-Ming Hsieh (2007);“Large-Scale Timing-Driven Rectilinear Steiner Tree Construction in Presence of Obstacles,” in Proceedings of IEEE International Midwest Symposium on Circuits and Systems (MWSCAS 2007), Canada, pp.1122-1125, 2007/8.(EI)
  28. Hsin-Hsiung Huang*, Hui-Yu Huang, De-Jing Huang, Tsai-Ming Hsieh (2006); “An Efficient Rectilinear Steiner Tree Algorithm with Obstacles,” in Proceedings of the 5th WSEAS International on Circuits, Systems, Electronics, Control and Signal (CSECS 2006), pp. 54－59, Texas, USA.2006/11. (EI)
  29. Hsin-Hsiung Huang*, Yung-Ching Chen, Tsai-Ming Hsieh (2006); “A Congestion-Driven Buffer Planner with Space Reservation”, in Proceedings of IEEE International Symposium on Circuits and Systems (ISCAS2006), pp. 5435－5438, Island of Kos, Greece, 2006/5. (EI)
  30. Hsin-Hsiung Huang*, Chung-Chiao Chang, Chih-Yuan Lin, Chih-Hung Lee, Tsai-Ming Hsieh; (2005); “Congestion-Driven Floorplanning by Adaptive Modular Shaping,” in Proceedings of IEEE Midwest Symposium on Circuits and Systems (MWSCAS 2005), pp.1067－1070, USA, 2005/8. (EI)
  31. Chin-Hui Wang, Chih-Hung Lee, Hsin-Hsiung Huang*, Yung-Ching Chen, Tsai-Ming Hsieh (2005);“A New Congestion and Crosstalk Aware Router,” in Proceedings of IEEE International Symposium on Circuits and Systems (ISCAS2005), pp. 6234－6237, Kobe, Japan, 2005/5. (EI)
  32. Shu-Ping Chang, Hsin-Hsiung Huang*, Yu-Cheng Lin, and Tsai Ming Hsieh (2007); “A Timing-Driven X-Architecture Router with Obstacles,” in Proceedings of 18-th VLSI Design/CAD Symposium, Hua-lien, Taiwan,2007/8.
  33. De-Jing Huang, Chih-Hung Lee, Hsin-Hsiung Huang*, Tsai-Ming Hsieh (2006); “A Performance-Driven X-architecture Global Router,” in Proceedings of 17-th VLSI Design/CAD Symposium, Hua-lien, Taiwan, 2006/8.
  34. Hsin-Hsiung Huang*, De-Jing Huang, Tsai-Ming Hsieh (2006); “Rectilinear Steiner Tree Construction with Obstacles,” 2006 International Workshop on Computer Architecture, VLSI, and Embedded Systems (ICS2006), Taipei, Taiwan, 2006/12.
  35. Yung-Ching Chen, Hsin-Hsiung Huang*, Tsai-Ming Hsieh (2005); “Congestion-Driven Buffer Planner with Space Reservation,” in Proceedings of 16-th VLSI Design/CAD Symposium, Hua-lien, Taiwan, 2005/8.
  36. Chung-Chiao Chang, Hsin-Hsiung Huang*, Chih-Yuan Lin, Tsai-Ming Hsieh (2004), ”Congestion-Driven Floorplanning by Adaptive Module Shaping,” in 15-th VLSI Design/CAD Symposium, Taiwan, 2004/8.

 (C) 專書及專書論文

  • “A Functional Decomposition Algorithm for Low Power Technology Mapping,” 碩士論文, 2000.
  • “Study on Partition-Based Routing Problems in Electronic Design Automation”, 博士論文, 2008.
  • 循跡迷宮鼠設計實務 / 蘇景暉, 李齊雄, 黃信雄著. -- 初版. -- 新北市 : 藍海文化, 2011.09 ISBN 978-986-6432-48-4(平裝)

(D) 技術報告

    • 黃信雄 (2009), “考量電子漂移和障礙物限制之電流導向線路佈線設計” , 國科會期末報告 , NSC 98-2221-E-262-015。
    • 黃信雄 (2010), “結合模組變形技術最小化晶片面積和關鍵路徑效能之3D面規劃” , 國科會期末報告 , NSC 99-2221-E-262-027-。
    • 李齊雄和黃信雄 (2010), “產業需求導向的線迷宮鼠教材與教具實作” , 國科會期末報告 , NSC 99-2511-S-262-003。